2 Bit Full Adder With Carry. The code before the keyword begin was to do the encapsulation so as to simulate the 2 bit adder. With this logic circuit two bits can be added together taking a carry from the next lower order of magnitude and sending a carry to the next higher order of magnitude.
First explaining binary addition. The half adder determines the least significant bit of the sum as the xor of the least significant bits of the inputs. 2 half adders and a or gate is required to implement a full adder.
Full adder full adder is a combinational logic circuit.
Implementation of full adder using nand gates. First explaining binary addition. The 2 bit adder holds 1 half adder and then 1 full adder as well. The full adder computes the sum of the inputs a 1 and a 2 and the carry bit.
