2 Bit Magnitude Comparator Using Logic Gates. A magnitude digital comparator is a combinational circuit that compares two digital or binary numbers in order to find out whether one binary number is equal less than or greater than the other binary number. Wouldnt it be really large.
I m not sure if my class expects us to draw this out. When a0 b0 01 b is more than a and hence ab is active. Schematic of 2 bit magnitude comparator using hybrid logic style is given in fig 11.
The circuit for a 4 bit comparator will get slightly more complex.
It consists of four inputs and three outputs to generate less than equal to and greater than between two binary numbers. If input a 0 logic low then both gates are at zero potential pmos is on provide low impedance path from v dd. It consists of one nmos one pmos transistor. This comparator compares the two bits and produces one of the 3 outputs as l a b e a b and g a b.
