2 To 1 Multiplexer Using Nand Gates. In stark contrast to the inverter based cmos implementation a ptl 2 to 1 multiplexer requires only six transistors. Two each for two transmission gates and two for the inverter that provides the complement of the s select signal.
F implementation of ex or gate using 2. Y s a s b where s is the select of the multiplexer. With regard to the previous point an and gate is really formed from a nand gate followed by a not gate similarly an or gate consists of a nor gate followed by a not gate.
First multiplexer will act as not gate which will provide complemented input to the second multiplexer.
E implementation of nor gate using 2. In the field of digital electronic circuits this implies that we can implement any boolean function using just nand gates. First multiplexer will act as not gate which will provide complemented input to the second multiplexer. 2x1 mux using nand gates as we know the logical equation of a 2 input mux is given as below.
