8 Bit Shift Register Using D Flip Flop. I am trying to put them together to get the full shift register but my output only gives xxxx regardless of the select inputs. A simple shift register can be made using only d type flip flops one flip flop for each data bit.
I am designing a shift register using hierarchical structural verilog. The output from each flip flop is connected to the d input of the flip flop at its right. I have designed a d flip flop and an 8 to 1 mux that uses 3 select inputs.
A cd4031 64 bit serial in serial out shift register is shown below.
Generally 8 bit 1 byte shift registers are common. The binary information 011 is obtained in parallel at the outputs of d flip flops for third positive edge of clock. To get a full 18 bit shift register the output of one shift register must be cascaded to the input of another and so on until all stages create a single shift register as shown below. The device features a serial data input ds eight parallel data inputs d0 to d7 and two complementary serial outputs q7 and q7.
